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ATT7030A appli cation note260-cs-105 ATT7030A application note ?????? http://www.hitrendtech.com page1 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 directory ATT7030A fe atures: 3 analog input circuitry 4 energy pulse out put circ uitry 5 power supply circuitry 9 ATT7030A work state whether or not right 9 pcb layout 10 ?????? http://www.hitrendtech.com page2 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 this application note describes th e implementation of a multifunctional three-phase energy meter using the ATT7030A. pleas e peruse ATT7030A?s user manual before reading this application note. ATT7030A features: ? active energy measure accord with iec 62053-21; ? selectable calculation mode for 3-phase energy combined (algebraic addition or absolute addition); ? provide high-frequency energy pulse output; ? provide pulse output f1/f2 for driving el ectromechanical counter and stepper motor; ? provide voltage-lost det ected for every phase; ? provide negative power indication revp when any one phase ac tive power is negative; ? provide negative phase indication (negp) when 3-phase combined power is negative; ? compatible with 3-phase 3-wire and 3-phase 4-wire; the internal block diagram in ATT7030A: the signal disposal flow chart: (&jp"?+ /t?t#k?yl$@ y http://www.hitrendtech.com page3 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com ATT7030A?s package is qfp44. t he external hardware circuitry includes power supply, voltage and current analog signal input, pulse out put and electromechanical counter. analog input circuitry ATT7030A incorporates 6 second-order 16-bits a dcs. the voltage sampling data is 0.2v ~ 0.6v. the current sampling data is 2mv ~ 1v. the energy linear error is less than 0.1%. every adc?s ac signal is input from vxp and vxn. at the same time the vxp and vxn need be added 2.4v direct current bias vo ltage, which could be obtained from ATT7030A?s reference voltage output ?refout? or external benchmark voltage. ATT7030A?s sampling input volt age can adopt resistance divided-vo ltage method (as diagram 1 and diagram 2), or switching voltage to current, then through current mutual inductance implement switching current to voltage (as diagram 3). the latter method adopt mutual inductance implement, which can segregate chip and electr ic power net, thereby can get fa vorable anti-jamming capability. in diagram 1, the neutral line vn is connected to reference voltage out put ?refo?, which achieves adding ac sampling signal to 2.4v direct current bias volt age expediently. in diagram 2, the neutral line vn is connected to chip?s ground, which is applied to power supply using autotransformer. diagram 1: vn is connected to refo diagram 2: vn is connected to ground diagram 3: current mutual inductance page4 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 in the above diagram, vp and vn are connected to phase line and neutral line, the relevant parameter correspond to 220v voltage. in diagram 3, the ct?s transformation ratio is 1:1. ct achieves ATT7030A?s sampling input cu rrent. there have nether connection method. diagram 4 current sampling differences input diagram 5 current sampling single-port input in diagram 4 and diagram 5, ia1 and ia2 is ct?s secondary signal. we should notice some points when design sampling input signal: 1. whatever input method, the direct current bias voltage of in put pin vxp and vxn should be 2.4v. the bias voltage must be provided by pin refout (pin 11), or else t he measurement precision couldn?t be assured. 2. for assuring measurement prec ision, the capacitanc e filter (10uf and 0.1uf) connected to pin 5 should be closer to the best to pin 5, furthermore any one can not be left out. the grounding point of capacitance and ground of sampli ng signal must be shorted. 3. in vxp and vxn input circuitry, 1.2k resi stance and 0.01uf c apacitance make up of antialiasing filter, whose structure and paramet er should be symmetrical. for attaining favorable temperature characteristic, we should adopt well co mponent in temperat ure capability. 4. in sampling input circuitr y, capacitance c3 (3300pf) is us ed to regulate phase error, whose magnitude should be decided by actual phase error. 5. default start-up current value is 0.1mv (0.1%ib). 6. in 3 phase 4 wire mode, voltage-depreciation threshold voltage is 75mv (15%vn); in 3 phase 3 wire mode, voltage-depreciation threshold voltage is 300mv (60%vn). 7. when any one phase current is reversed to voltage, the pin 40 (revp) would output high level. base on this we can judge t he correctness of connection. 8. sel pin connected to high level denotes 3 phase 4 wire connection method; low level denotes 3 phase 3 wire connection method. 9. the 3-phase 3-wire meter adopts two-component measurement method. in this condition sel is selected to low level, vb subs titutes vn in connection interf ace. the voltage sampling input v4p/v4n and current sampling input v3p/ v3n can become unaided signal input. 10. when 3-phase energy addition mode selects al gebraic addition, negp can output direction indication basing on the sign of 3- phse power algebraic additions. usi ng this function, we can make stop-reverse 3-phase energy meter convenient. energy pulse output circuitry ?????? http://www.hitrendtech.com page5 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com in power measurement signal processing ci rcuitry, switched vo ltage and current signal multiply to get hold of instantaneous power, which integrating to the time to turn into energy. a/b/c phase energy is summated according to algebraic addition mode or absolute addition mode basing on input pin sum, through switching the result to frequency signal and divided-frequency, then we get hold of energy pulse output signal which could be used to calibrate . on this foundation, di vided-frequency again can get hold of low-frequency pulse output signal which could be used to drive stepper motor. underside is divided-frequency sketch map when high-frequency output constant is 64. the pulse-width of energy pulse output is 90ms. when pulse cycle is le ss than 180ms, energy pulse output duty cycle is 1 : 1. underside is divided-frequency sketch map when low-frequency output c onstant is 32. the pulse-width of energy pulse output (f1/f2) is 275ms. when pulse cycle is less than 550ms, energy pulse output duty cycle is 1 : 1. how to select appropriate pulse constant and elec tromechanical counter ratio? in other words, how to select scf/s1/s0? if we use cf to denote the frequency of calibration pulse, then cf=1600*vu*vi*g*g/hfreq 1 thereinto vu is input voltage on the voltage sampling pin (v2p and v2n, v4p and v4n, v6p and v6n) in rated voltage condition; vi is input voltage on the current sampling pin (v1p and v1n, v3p and v3n, v5p and v5n) in rated current condition. g = 0.648 (correspond to 2.5v reference voltage). hfreq is high-frequency out put constant. on the other hand, cf=n*un*ib/3600000 2 thereinto n is pulse constant (c alibration constant), un is rat ed voltage, ib is rated current. page6 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com follow above two formula, hfreq=5760000000* vu*vi*g*g/ n*un*ib 3 by usually, vi is 0.1v; vu (0.2v ~ 0.6v) is selected to make hfr eq close to the value in list-1 basing on un, ib and pulse constant n. list-1 scf s1 s0 hfreq lfreq 0 0 0 256 16 0 0 1 128 16 0 1 0 128 8 0 1 1 128 4 1 0 0 64 16 1 0 1 64 8 1 1 0 64 4 lfreq is divided-frequency coefficient for dr iving electromechanical counter. the ratio of electromechanical counter should be: n/lfreq*2 4 give a example: design a 3 phase 4 wir e meter, the rated voltage is 220v, rated current is 5a, then how to select pulse cons t? how to select ratio of electromechanical counter? how to select scf/s1/s0? how much is the sampling voltage in voltage loop? step 1 : suppose vu = 0.5v, vi = 0.1v, by formula 3: hfreq=5760000000*0.5*0.1*0.648*0.648/ 220*5*n =109938/n then n=109938/ hfreq hfreq 256 128 64 n 429 858 1717 so pulse constant can be selected as 429 ~ 1717. calibration pulse would be faster along with pulse constant?s augment, which can s horten calibration time in feeble-signal. pulse constant can be selected as 400, 800, or 1600 after switched to integer; corresponding hfreq is 256, 128, 64. if pulse constant is selected as 320, then sampling voltage = 0.5*320/429 = 0.37v, at this time corresponding hfreq is still 256. step 2 : select ratio of electromechanical counter basing on list-1, if hfreq = 256, then lfreq = 16, so ratio = 400/16*2=50, scf/s1/s0 = 0/0/0. if pulse const is 320, then ratio is 40. if hfreq = 128, lfreq can be selected as 16, 8, or 4. when lfreq = 16, ratio = 800/16*2=100, scf/s1/s0 = 0/0/1. when lfreq = 8, ratio = 800/8*2=200, scf/s1/s0 = 0/1/0. when lfreq = 4, ratio = 800/4*2=400, scf/s1/s0 = 0/1/1. if hfreq = 64, lfreq can be selected as 16, 8, or 4. when lfreq = 16, ratio = 1600/16*2=200, scf/s1/s0 = 1/0/0. when lfreq = 8, ratio = 1600/8*2=400, scf/s1/s0 = 1/0/1. when lfreq = 4, ratio = 1600/4*2=800, scf/s1/s0 = 1/1/0. step 3 : calculate sampling voltage vu by usually, ct achieves ATT7030A?s samp ling input current. connect appropriate resistance at ct?s secondary coil can make vi = 0.1v. by formula (3): vu = hfreq*n*un*ib/ 5760000000*vi*g*g = 64*1600*220*5/ 5760000000*0.1*0.648*0.648 page7 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com = 0.4657v this value is in 0.2v ~ 0.6v, accords with the design requirement. when hfreq is made certain, sampling voltage woul d be smaller along with pulse constant n?s smaller. step 4 : select divided-voltage resistance select divided-voltage need c onsider nether factor: (1) consumed power; (2) voltage resistance of divided-voltage; (3) adjustable error range. basing on antialiasing filter?s parameter demand in voltage loop, we sugges t that the connected to ground resistance in voltage loop is 1.2k, then divided-resistance = 220*1.2/0.4657 = 566k. considering reference voltage? di fference in actual application, we should reserve 25% adjustable range, so sampling resistance is selected in 450k- 560k, thereinto 450k is apt otic resistance and about 110k is adjustable resistance. considering double over-voltage c apability, aptotic resistance need endure 400v voltage. if every resistance?s over-voltage capability is 50v (please refer to the tec hnique parameter of resistance), then we need eight aptotic resistances and the value is 450/8 = 56k. if minima l adjustable precision is 0.1%, then minimal adjustable resistance could be 680 ? . adjustable resistance 680 1.2k 2.7k 4.7k 6.2k 10k 20k 47k adjustable precision 0.1% 0.2% 0.4% 0.8% 1% 2% 4% 9% the nether circuitry is sampling voltage input, which uses resistance divided-voltage method. we should notice some points when des ign energy pulse output signal: 1. select appropriate level of input pin sum. if sum is connected to high level, then: in 3-phase 4-wire mode, 3-phase energy?s ca lculation uses algebraic addition. in 3-phase 3-wire mode, 3-phase energy?s calculation uses absolute addition. if sum is connected to low level (default), then: in 3-phase 4-wire mode, 3-phase energy?s calculation uses absolute addition. in 3-phase 3-wire mode, 3-phase energy?s ca lculation uses algebraic addition. 2. if stepper motor is used to output signal , f1 and f2 ports should be connected to resistance- capacitance filter. page8 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com 3. connect 1000p ~10nf decoupling capacitance nearly at energy pulse output port cf1. the latter two points can achieve fa vorable electromagnetism compatibility. power supply circuitry this is 3-phase power supply circuitry schematics : the design of power supply circui try is greatly important to energ y meter?s capability. for assuring favorable electromagnetism compatibility , we should notice nether points: 1. power supply voltage vcc and avcc don?t exceed 5v 5% as specified for normal operation. 2. the output port of 7805 is connected 2200uf filter capacitance. 3. gnd and agnd are digital and analog ground re ference point. in pcb layout they should be connected to great area ground handy. for assuring low resistance characte ristic of ground, gnd and agnd shouldn?t be differentia ted and connected induc tance, resistance, magnetic core element. 4. great area ground layout cannot be put to front of commutating element. underside of the fixed resistance of voltage sampling cannot be laid ground. strong electricity and week electricity must be detached. 5. vn should connect voltage- hy persensitive resistance, and t hen connect to chip?s internal circuitry. ATT7030A work stat e whether or not right how to judge ATT7030A?s work stat e whether or not right after power up? we should check it from nether points: 1. ic voltage. vcc and avcc should be loaded 5v voltage after power up. vdd (pin 33 and pin 39) is brought by the ATT7030A, and is 3.0v in working order. pin 5 is internal reference voltage. pin 11 is reference voltage output, used for providing cu rrent bias voltage for external input circuitry. the normal voltage of this two pin is 2.3v ~ 2.7v, which is brought by the ATT7030A. 2. crystal surge frequency: 24.576mhz . check the frequency and amplitude. 3. reset (pin 1) is high level when ATT7030A is normal. if reset is low level, denotes the page9 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ATT7030A is in reset state. 4. sig should be low level all along. above signals are normal denotes t he ATT7030A is in working orde r, or else we should check connection, short circui t and false jointing etc. pcb layout we use nether pcb for ATT7030A to ex plain fundamental for ATT7030A?s pcb layout. 1. first of all, strong elec tricity and week electricity mu st be detached in pcb layout. 2. phase line, neutral line and refo ut pin should be connected to vo ltage- hypersensitive resistance at first, which can protect latter element. ?????? http://www.hitrendtech.com note note page10 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com the connect line of neutral li ne and voltage-hypersensitive resi stance should be as thick as possible to absorb disturbance. in resistance network divided-voltage circuitr y, the connect line?s br eadth of neutral line and internal circuitry should exceed 1mm. 3. ground connection is very importa nt to electromagnetism compatibilit y. notice the connect points of power supply ground and signal ground. the power supply input of manostat module and gnd should be connected at one point,so that disturbance in power supply can not arrive at whole system. 4. in pcb layout, the digital ground and analog ground should be connected to great area ground handy to reduce resistance, inductance and distributing capac itance in ground. 4. in pcb layout, the digital ground and analog ground should be connected to great area ground handy to reduce resistance, inductanc e and distributing c apacitance in ground. page11 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com 5. notice the position of filter capacit ance at the ATT7030A?s power supply pin. 6. refcap pin should be c onnected filter capacitanc e, which can improve stability of reference voltage. page12 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com 7 in high frequency radicalization area,the winding and magnet in stepper motor could be regarded as antenna, so filter circuitry should be used in signal line of driving stepper motor. page13 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/
ATT7030A appli cation note260-cs-105 ?????? http://www.hitrendtech.com 8 as usually, the line of high fr equency energy output pulse is very long, so decoupli ng capacitance is needed. 9 crystal oscillator is high frequency element, so its? neighborhood should be laid great area ground and avoid other signal line to traverse. page14 of 14 rev1.0 www.datasheet.co.kr datasheet pdf - http://www..net/

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